Together with Hengyi, Into a New Era.

As a chip design expert, participate in the design and implementation of the company’s high-performance RISC-V CPU processor chips.

Participate in designing high-performance processor pipelines and RISC-V CPU microarchitecture modules.

Participate in the design of high-performance processor front-end, execution, memory access, and system control modules.

Participate in R&D for subsystems, AI acceleration extensions, and Chiplet interconnects.

Advance chip functional and performance verification in accordance with RISC-V international standards.

Bachelor’s degree or higher in Electronic Engineering, Computer Science, Microelectronics, or a related field.

Familiar with computer architecture and have an in-depth understanding of chip design and verification processes.

Familiar with digital circuit design flows and proficient in writing RTL code.

Familiar with development languages such as Verilog, C/C++, and Python.

Experience designing CPUs, Vector, Matrix, or AI accelerators is preferred.

Responsible for planning high-performance RISC-V processor architectures and defining key technology roadmaps.

Conduct performance analysis and architectural modeling of core modules, and optimize hardware-software collaboration.

Drive microarchitecture implementation and coordinate design, verification, and software teams.

Track advanced industry technologies and develop roadmaps for next-generation products.

Bachelor’s degree or higher in Computer Science, Microelectronics, or a related field.

More than five years of experience in CPU, SoC, or accelerator architecture R&D.

Familiar with cache coherence, on-chip interconnects, and memory subsystems.

Strong cross-functional communication and technical decision-making skills.

Responsible for developing verification plans, verification environments, and test cases for processor cores and subsystems.

Build module-level and system-level verification platforms using UVM.

Achieve coverage closure, debug issues, and automate regression testing.

Participate in formal verification, performance verification, and post-silicon emulation.

Familiar with SystemVerilog, UVM, and commonly used EDA verification tools.

Understand the RISC-V instruction set and processor pipeline architecture.

Proficient in scripting with Python, Shell, and other languages.

Experience verifying CPUs or complex SoCs is preferred.

Responsible for developing and optimizing the performance of RISC-V LLVM/GCC compiler toolchains.

Implement support for vector extensions, matrix extensions, and custom instructions.

Build compiler testing, performance analysis, and continuous integration systems.

Collaborate with chip and system teams to drive hardware-software co-optimization.

Proficient in C/C++, with a solid foundation in data structures and algorithms.

Familiar with the LLVM or GCC compiler framework and intermediate representations.

Knowledge of computer architecture and the RISC-V instruction set.

Experience in high-performance computing or AI compilers is preferred.

Develop chip BSPs, bootloaders, drivers, and system software.

Adapt the Linux kernel, debug device drivers, and optimize performance.

Support chip validation, board-level debugging, and customer issue diagnosis.

Maintain software releases, development documentation, and automated testing environments.

Proficient in C and embedded software development workflows.

Familiar with the Linux kernel, driver model, and commonly used peripheral interfaces.

Able to read hardware schematics and perform board-level debugging.

Experience developing on RISC-V platforms is preferred.

Participate in AI computing platform deployment, performance testing, and scenario validation.

Assist with model adaptation, operator analysis, and system performance tuning.

Build automated testing tools and organize product technical documentation.

Support customer scenario validation and issue tracking through resolution.

Currently pursuing a bachelor's degree or higher in computer science, artificial intelligence, or a related field.

Familiar with Linux, Python, and basic deep learning frameworks.

Strong learning, analytical, and communication skills.

Candidates available to intern at least four days a week are preferred.